u32 r[16];
u32 CPSR;

u8 ram[1024];

u32 proc_state;

#define SP r[13]
#define LR r[14]
#define PC r[15]

#define ARM_PC_INCREMENT 4
#define THUMB_PC_INCREMENT 2

#define EQ 0x0
#define NE 0x1
#define CS 0x2
#define CC 0x3
#define MI 0x4
#define PL 0x5
#define VS 0x6
#define VC 0x7
#define HI 0x8
#define LS 0x9
#define GE 0xA
#define LT 0xB
#define GT 0xC
#define LE 0xD
#define AL 0xE

#define THUMB_MODE ((CPSR & 0x0010) >> 4)

/* processor states code */
#define NORMAL_STATE 0
#define ILLEGAL_INSTRUCTION 1
